1. Technical Field
The present invention relates to a semiconductor memory apparatus, and more particularly, to an apparatus for controlling a column selecting signal of a semiconductor memory apparatus and a method of controlling the same.
2. Related Art
In recent years, the operating frequency of a semiconductor memory apparatus has increased so as to write or read a large amount of data more quickly. In addition, unlike when the semiconductor memory apparatus is used regardless of power consumption in a system, such as a desktop where the memory can generally use commercial power, the semiconductor memory apparatus is now widely used in portable equipment, such as a notebook computer or a PMP (Portable Multimedia Player), where a battery has a predetermined runtime.
Therefore, various power supply voltage levels in the memory are reduced so as to realize low power consumption, and the voltage levels of various control signals are correspondingly reduced.
There are various kinds of control signals that are used in the semiconductor memory apparatus. Among the control signals, a column selecting signal (hereinafter, simply referred to as a “Yi”) is a very important signal that designates timings of data read and data write, which are basic memory operations.
According to the related art, as shown in FIG. 1, the Yi is generated by a column decoder 10 and output to a cell array 20 among a plurality of cell arrays that corresponds to the Yi Further, data write operations and data read operations on corresponding cells are performed during an enable period, that is, the pulse width of the Yi, by a corresponding sense amplifier or the like.
However, as described above, the existing semiconductor memory does not generate a Yi when a power voltage level is low, causing data reading and writing errors in the semiconductor memory apparatus. In particular, when the operating frequency increases, the above-described errors in the Yi generation become worse.